View RT9237_180292.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Preliminary
RT9237
Multi-Phase DC/DC Controller for CPU Core Power Supply
General Description
The RT9237 is www..com a integrated with multi-phase buck DC/DC controller all control functions for high
Features
Multi-Phase Power Conversion with Automatic Phase Selection VRM 9.0 DAC Output with Active Droop Compensation for Fast Load Transient Precise Channel Current Sharing with Differential Sense Input Hiccup Mode Over Current Protection Programmable Under Voltage Lockout and Soft Start High Ripple Frequency, (Channel Frequency 200KHz) Times Channel Number
performance processor VRM. The RT9237 drives 2, 3 or 4 buck switching stages operating in interleaved phase set automatically. The multi-phase architecture provides high output current while maintaining low power dissipation on power devices and low stress on input and output capacitors. The high equivalent operating frequency also reduces the component dimension and the output voltage ripple in load transient. RT9237 regulates both easily set voltage and current loops. Precise current sharing for power stage is achieved by differential input current sense and processing circuit. The settings of current sense, droop tuning and over current protection are independent to compensation circuit of voltage loop. The feature greatly facilitates the flexibility of CPU power supply design and tuning. The RT9237 uses a 5-bit DAC of 1.1V to 1.85V (25mV/step) output with load current droop compensation to meet the strict VRM transient requirement. The IC monitors the VCORE voltage for PGOOD and over voltage protection. Soft start, over current protection and programmable under voltage lockout are also provided to assure the safety of microprocessor and power system.
Pin Configurations
Part Number RT9237CS (Plastic SOP-28)
VID4 VID3 VID2 VID1 VID0 COMP FB ADJ GND
1 2 3 4 5 6 7 8 9
Pin Configurations TOP VIEW
VDD PGOOD 26 PWM4
28 27 25 24 23
ISP4 ISP1 PWM1 22 PWM2 21 ISP2 20 ISP3 PWM3 ISN1 17 ISN2
19 18 16 15
VSEN 10 IRMP 11 DVD 12 IMAX 13 SS 14
ISN3 ISN4
Applications
Power Supply for Server and Workstation Power Supply for High Current Microprocessor
Ordering Information
RT9237 Package Type S : SOP-28 Operating temperature range C: Commercial standard
DS9237-00 January 2002
www.richtek-ic.com.tw
1
RT9237
Absolute Maximum Ratings
Supply Voltage Input, Output or I/O Voltage
www..com
Preliminary
7V GND-0.3V ~ VDD+0.3V 0C ~ 70C 0C ~ 125C -65C ~ 150C 0.625W 60C /W 260C
Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Power Dissipation, PD @ TA = 25C SOP-28 Package Thermal Resistance SOP-28, JA Lead Temperature (Soldering, 10 sec.)
Electrical Characteristics
(VDD = 5V, GND = 0V, TA = 25C, unless otherwise specified) Parameter VDD Supply Current Nominal Supply Current Power-On Reset VDD Rising Threshold VDD Falling Threshold VDVD Rising Trip Threshold Oscillator Frequency Ramp Amplitude Ramp Valley Maximum On Time of Each Channel IRMP Pin Voltage Reference and DAC DACOUT Voltage Accuracy DAC (VID0-VID4) Input Low Voltage DAC (VID0-VID4) Input High Voltage DAC (VID0-VID4) Bias Current PWM Controller Error Amplifier DC Gain Bandwidth Slew Rate Current Sense GM Amplifier ISP 1,2,3,4 Full Scale Source Current ISP 1,2,3,4 Current for OCP -80 50 ---A A CL = 10pF ---85 10 5 ---dB MHz V/S -1.0 -2.0 10 ---20 +1.0 0.8 -40 % V V A RIRMP = 56k VOSC For each phase RIRMP = 56k 170 -1.0 -0.95 200 1 1.3 75 1 230 ---1.05 kHz V V % V 4.2 3.7 1.19 4.35 3.85 1.25 4.5 4 1.31 V V V IDD PWM 1,2,3,4 Open -6 -mA Symbol Test Conditions Min Typ Max Units
To be continued
www.richtek-ic.com.tw DS9237-00 January 2002
2
Preliminary
Parameter Protection IMAX Voltage
www..com
RT9237
Min 0.55 -116 Typ 0.6 10 120 108 92 Max 0.65 -124 --Units V A % % %
Symbol
Test Conditions
RIMAX = 15k VSS = 1V
SS Current
Over-Voltage Trip (VSEN/DACOUT) Power Good Upper Threshold (VSEN/DACOUT) Lower Threshold (VSEN/DACOUT) VSEN Rising VSEN Rising
---
Function Block Diagram
DVD IMAX IRMP
VDD PGOOD VID0 VID1 VID2 VID3 VID4
Power On Reset
Oscillator
120% VDAC DAC 108% VDAC 92% VDAC
INH
+_ +_
INH OVP, PGOOD POR Logic Current Limit
PWM Logic & Driver PWM Logic & Driver PWM Logic & Driver PWM Logic & Driver
_+
PWM1
PWMCP INH PWMCP INH PWMCP INH
+ _ +_
PWM2
+_ +_
Current Balance
PWM3
VSEN ADJ Droop Control EA
Processor
PWM4
+_
PWMCP ISP1 ISN1 ISP2 ISN2 ISP3 ISN3 ISP4 ISN4
+_
FB
CS1 CS2
GND
CS3 CS4
COMP
SS
DS9237-00 January 2002
_+
_+
SS Control
_+
www.richtek-ic.com.tw
3
RT9237
Preliminary
Table 1 Output Voltage Program Pin Name Nominal Output Voltage DACOUT Off 1.100V 1.125V 1.150V 1.175V 1.200V 1.225V 1.250V 1.275V 1.300V 1.325V 1.350V 1.375V 1.400V 1.425V 1.450V 1.475V 1.500V 1.525V 1.550V 1.575V 1.600V 1.625V 1.650V 1.675V 1.700V 1.725V 1.750V 1.775V 1.800V 1.825V 1.850V
VID4 www..com 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Note: (1) 0:Connected to GND (2) 1:Open
www.richtek-ic.com.tw
DS9237-00 January 2002
4
www..com
DS9237-00 January 2002
+5V 2H C7 1F Typical 12V R3 10K 6 VCC 7 PVCC C3 1F Q1 PHB83NO3LT L2 2H 5 Q2 PHB95NO3LT 0.01F C5 1000F C6 1000F VCORE C4 1F PHASE 8 3 PWM GND 4 LGATE R1 2.4K 2 BOOT 1 UGATE PGOOD 5V C1 1F C2 100F 12V L1 1 VID4 VID3 VID2 VID1 ISP4 ISP1 PWM1 22 21 R10 2.4K Typical 12V 5V R2 2.4K 6 7 VCC PVCC C13 1F 3 20 19 18 17 R13 16 2.4K 15 C8 1F C9 100F PWM2 ISP2 ISP3 PWM3 ISN1 ISN2 ISN3 ISN4 23 24 VID0 COMP FB ADJ GND VSEN IRMP DVD IMAX SS 25 PWM4 26 PGOOD 27 VDD 2 3 4 5 6 7 8 9 10 11 12 13 14 28
Typical Application Circuit
VID4
VID3
VID2
R5
C10 6.6nF R 6
VID1
RT9600
2.4K
R7
24K
VID0
C12
Preliminary
C14 R8
33pF
R9 1K
R12
12V
2 BOOT 1 UGATE PHASE 8
C11 1F
Q3 PHB83NO3LT L3 2H
R15 39K
13K
R14 2.4K
R11 12K
RT9600
PWM GND 4 LGATE
C17 0.1F
RT9237
5 Q4 PHB95NO3LT
0.01F
C15 1000F
C16 1000F
RT9237
www.richtek-ic.com.tw
5
RT9237
Functional Pin Description
VID4, VID3, VID2, VID1 and VID0 ( Pin1,2,3,4,5)
www..com DAC voltage identification
Preliminary
ISEN1 (Pin 18), ISEN2 (Pin 17), ISEN3 (Pin 16) and ISEN4 (Pin 15) Current sense inputs from the individual converter channel's sense component GND nodes. ISP1 (Pin 24), ISEN2 (Pin 21), ISEN3 (Pin 20) and ISEN4 (Pin 25) Current sense inputs for individual converter channels. Tie this pin to the component sense node.
inputs for VRM9.0. These
pins are TTL-compatible and internally pulled to VDD if left open. COMP (Pin 6) Output of the error amplifier and input of the PWM comparator. FB (Pin 7) Inverting input of the internal error amplifier. ADJ (Pin 8) Current sense output for active droop adjust. Connect a resistor from this pin to GND to set the amount of load droop. GND (Pin 9) Ground for the IC. VSEN (Pin 10) Power good and over voltage monitor input. Connect to the microprocessor-CORE voltage. IRMP (Pin 11) PWM ramp amplitude set by external resistor. Ramp amplitude = 1V x (R [IRMP] / 56K) DVD (Pin 12) Programmable power UVLO detection input. Trip threshold = 1.25V at V(DVD) rising IMAX (Pin 13) Over current protection amplitude set. SS (Pin 14) Connect this SS pin to GND with a capacitor to set the start time interval. Pull this pin below 1V(ramp valley of saw-tooth wave in pulse width modulator) to shutdown the converter output.
PWM1 (Pin 23), PWM2 (Pin 22), PWM3 (Pin 19) and PWM4 (Pin 26) PWM outputs for each driven channel. Connect these pins to the PWM input of the MOSFET driver. For systems which use 3 channels, connect PWM4 high. Two channel systems connect PWM3 and PWM4 high. PGOOD (Pin 27) Power good open-drain output. VDD (Pin 28) IC power supply. Connect this pin to a 5V supply.
www.richtek-ic.com.tw
DS9237-00 January 2002
6
Preliminary
RT9237
Simplified Block Diagram Control Loops for a Two Phase Converter
www..com
VDAC ADJ Droop Control EA Current Balance FB GND SS Control COMP SS Processor
+ _
PWM Logic & Driver PWM Logic & Driver ISP1 ISN1 ISP2 ISN2
PWM1
CS1 CS2 VIN
RT9600
R LOAD
C OUT
VIN
RT9600
Voltage loop Current loop
DS9237-00 January 2002
_+
_+
+ _
PWMCP PWM2
+_
PWMCP
www.richtek-ic.com.tw
7
RT9237
Operation
Preliminary
RT9237 is a multi-phase DC/DC controller that precisely regulates CPU core voltage and balances
www..com
Fault detection The chip detects VCORE for over voltage and power good detection. The "hiccup mode" operation of over current protection is adopted to reduce the short circuit current. The in-rush current at the start up is suppressed by the soft start circuit through clamping the pulse width and output voltage.
the current
of
different
power
channels.
The
converter consists of RT9237 and its companion MOSFET driver provide high quality CPU power and all protection function to meet the requirement of modern VRM. Voltage control The reference of VCORE is provided by a 5-bit DAC of VRM9.0 specification. Control loop consists of error amplifier, multi-phase pulse width modulator, driver and power components. Like conventional voltage mode PWM controller, the output voltage is locked at the VREF of error amplifier and the error signal is used as the control signal VC of pulse width modulator. The PWM signals of different channels are generated by comparison of EA output and spiltphase saw-tooth wave. Power stage transforms VIN to output by PWM signal on-time ratio. Current balance RT9237 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal balance circuit. The current balance circuit sums and averages the current signals then produces the balancing signals injected to pulse width modulator. If the current of some power channel is greater than average, the balancing signal reduces the output pulse width to keep the balance. Load Droop The sensed power channel current signals regulate the reference of DAC to form a output voltage droop proportional to the load current. The droop or so call "active voltage positioning" can reduce the output voltage ripple at load transient and the LC filter size.
Application Circuit setting
Phase setting and converter start up RT9237 interface with companion MOSFET driver (like RT9600 or HIP660X series) for correct converter initialization. The tri-phase PWM output (high, low, high impedance) pins sense the interface voltage at IC POR acts (both VDD and DVD trip). The channel is enabled if the pin voltage is 1.2V less than VDD. Please tie the PWM output to VDD and the current sense pins to GND or left float if the channel is unused. For 2-channel application, connect PWM3 and PWM4 high. 3-channel application connect PWM4 high. Current sensing setting RT9237 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal circuit (see Fig.1).
IX
_
Sample & Hold To Current Balance To Droop Tune 2/3 IX 2/3 IX To Over Current Detection 2/3 IX
GM
+
IBP IBN
ISPX RSP ISN X RSN RS IL
Fig.1 Current Sense Circuit
www.richtek-ic.com.tw DS9237-00 January 2002
8
Preliminary
The sensing circuit gets IX =
IL x RS by local feedback. RSP
RT9237
Protection and SS function For OVP, the RT9237 detects the VCORE by VSEN pin. Eliminate the parasitic delay and noise influence on the PCB path for fast and accurate detection. The trip point of OVP is 120% of normal output level. The PWM outputs are pulled low to turn on the low side MOSFET and turn off the high side MOSFET of the synchronous rectifier at OVP. The OVP latch can only be reset by VDD or DVD restart power on reset sequence. The PGOOD detection trip point of VCORE is 8% out of the normal level. The PGOOD open drain output pulls low when VOCRE exceeds the range. Soft start circuit generates a ramp voltage by charging external capacitor with 10uA current after IC POR acts. The PWM pulse width and VCORE are
RSP = RSN to cancel the voltage drop caused by GM amplifier input bias current. IX is sampled and held
www..com just before low
side MOSFET turns off (See Fig.2).
Therefore,
I X ( S / H) = TOFF VO TOFF IL(S / H) x RS , IL(S / H) = IL( AVG) - , x L 2 RSP
VIN - VO = x 5S , for operating frequency = 200kHz VIN VIN - VO VO - x 5S VIN x RS = IL( AVG) - RSP 2L
IX (S / H)
Falling Slope = VO /L
IL IL (AVG) IL (S/H)
clamped by the rising ramp to reduce the in-rush current and protect the power devices. Over current protection trip point is set by the resistor
Inductor Current
PWM Signal & High Side MOSFET Gate Signal
RIMAX connected to IMAX pin. OCP is triggered if one channel S/H current signal IX> forces PWM output latched at high impedance to turn
3 0.6 x . Controller 2 RIMAX
Low Side MOSFET Gate Signal
off both high and low side MOSFET in the power stage and initial the hiccup mode protection. The SS pin voltage is pulled low with a 10A current after it is less than 90% VDD. The converter restarts after SS pin voltage < 0.2V. Three times of OCP disable the converter and only release the latch by POR acts (see Fig.4).
COUNT = 1 COUNT = 2 4V 2V 0V VCORE OVERLOAD APPLIED IL 0A T0T1 T2 TIME T3T4 COUNT = 3 SS
Fig. 2 Inductor Current and PWM Signal Droop Tuning The S/H current signals from power channels are injected to ADJ pin to create droop voltage.
V ADJ = R ADJ x 2 IX 3
The DAC output voltage decreases by VADJ to form the VCORE load droop(see Fig.3).
VDAC _ VADJ 2/3 IX1
_ +
COMP
EA
FB +
IX
ADJ R ADJ
2/3 IX2 2/3 IX3 2/3 IX4
VDAC - VADJ
Fig. 4
Fig. 3 Droop Tune Circuit
DS9237-00 January 2002 www.richtek-ic.com.tw
9
RT9237
Preliminary
3-Phase Converter and Components Function Grouping
12V
www..com
VCC PVCC
BOOT UGATE PHASE
RT9600
PWM +5V LGATE GND
VDD VID PWM1 ISP1 ISN1 COMP FB VSEN PWM2 ADJ VCC PVCC BOOT UGATE PHASE +VCORE 12V
Compensation & Offset
RT9600
PWM LGATE GND
Droop Setting
12V
RT9237
DVD IRMP SS
Driver Power UVLO Ramp Setting
ISP2 ISN2 12V VCC PVCC BOOT UGATE PHASE
PWM3 ISP3
IMAX
ISN3
OCP Setting
GND PWM
RT9600
LGATE GND
Current Sense Components
Design Procedure Suggestion
Voltage Loop setting a. Output filter pole and zero (Inductor, output capacitor value & ESR) b. Error amplifier compensation & saw-tooth wave amplitude(compensation network & IRMP pin resistor) Current loop setting a. GM amplifier S/H current(current sense component Ron, ISPx & ISNx pin external resistor value, keep ISPx current < 50uA at full load condition)
b. Over current protection trip point(IMAX pin resistor, keep ISPx current<80uA at OCP condition) VRM load line setting a. Droop amplitude (ADJ pin resistor) b. No load offset(additional resistor in compensation network) Power sequence & SS DVD pin external resistor and SS pin capacitor PCB layout a. Kelvin sense for current sense GM amplifier input b. Refer to layout guide for other item
www.richtek-ic.com.tw
DS9237-00 January 2002
10
Preliminary Design Example
Three phase converter VCORE = 1.5V, VIN = 12V, full load current = 60Amp, droop voltage at full load = 120mV, OCP www..com trip point for each power stage = 30Amp (at Sample/Hold), low side MOSFET RDS(ON)
Gain (dB)
RT9237
Asymptotic Bode Plot of PWM Loop Gain
100 80 60 40 20 0 -20 -40 -60 10 10 100 100 1K 1000
Compensated EA Gain PWM Loop Gain Modulator Gain Uncompensated EA Gain
= 6m at room temperature, L = 2H, COUT = 9000F, capacitor ESR = 2m . 1. Compensation setting a. Modulator Gain, Pole and Zero Modulator Gain = VRAMP , saw-tooth wave amplitude VRAMP = 1V x
VIN 56k , choose RIRMP RIMP 1 = 1.2kHz ,
10K 10000
100K 100000
1M 10M 1000000 10000000
= 39K, VRAMP = 1.4V, modulator Gain = 8.6 =
2 LC 1 ESR zero = CRESR = 8.8kHz 2
Frequency (Hz)
18.7dB, LC filter pole =
Fig. 6 Asymptotic Bode Plot of PWM Loop Gain 2. Droop setting Full load current of each power channel = 60A/3 = 20Amp, the ripple current = IL =
1.5 V 1.5 V x 1 - = 3.28 A 2H 12 V IL , load current at S/H = 20 A - 2 = 18.36 A , GM RDS(ON) x 18.36 A Amp S/H IX(MAX ) = , suggested IX RSP 5S x
b. EA compensation network Use type 2 compensation scheme (see Fig. 5),
1 1 ,FZ = , FP = C1 x C2 2R 2C1 ) 2R 2( C1 + C2 R2 mid-band gain = . Choose R1 = 2.4K, R2 = R1
24K, C1 = 6.6nF, C2 = 33pF, get FZ = 1KHz, Fp = 200KHz, mid-band Gain=10=20dB, modulator asymptotic Bode plot of EA compensation and PWM loop Gain Bode shown as Fig. 6.
C1 C2 COMP
_
at full = 40A50A, choose RSP = RSN = 2.7K, IX(MAX) = 40.8A, required Droop = 120mV = 40.8Ax3x2/3xRADJ RADJ = 1.47K. Take the temperature rising for consideration, if MOSFET working temperature=70C and the temperature coefficient =5000ppm/C, the
R2
C3 R1
R3 VCORE
RDS(ON)(70C) = 6m x {1+(70C-27C) x 5000ppm/C} = 7.3 m, RADJ(70C) = RADJ(27C) x {RDS(ON)(27C)/RDS(ON)(70C)} = 1.21K 3. Over Current Protection setting OCP trip point current = 30A (at Sample/Hold)
IX = RDS(ON) x 30 A 3 0.6 V RIMAX=13.6K =x RSP 2 RIMAX
EA
+
FB
R 3, C3 are used in type 3 compensation scheme (left NC in type 2) R OL R OL for no load offset setting
DACOUT
Take the temperature rising for consideration, RIMAX(70C) = RIMAX(27C) x {RDS(ON)(27C)/RDS(ON)(70C)} = 11.2K
Fig. 5 EA Compensation Network
4. SS capacitor CSS = 0.1F is the suitable value for most application.
DS9237-00 January 2002
www.richtek-ic.com.tw
11
RT9237
Layout Guide
Layout Guide
www..com
Preliminary
Place the high-power switching components first, and separate them from sensitive nodes. 1. Most critical path: the current sense circuit is the most sensitive part of the converter. The current sense resistors tied to ISP1,2,3,4 and ISN1,2,3,4 should be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCB trace of sense nodes should be parallel and as short as possible. Kelvin connection of the sense component (additional sense resistor or MOSFET RDS(ON)) ensures the accurate stable current sensing.
2. Switching ripple current path: a. Input capacitor to high side MOSFET b. Low side MOSFET to output capacitor c. The return path of input and output capacitor d. Separate the power and signal GND e. The switching nodes(the connection node of high/low side MOSFET and inductor) is the most noisy points. Keep them away from sensitive small-signal node. f. Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via. 3. MOSFET driver should be close to MOSFET 4. The compensation, bypass and other function setting components should be near the IC and away from the noisy power path.
No Kelvin sense, no guarantee for stable operation!
SW1
L1
VIN R IN C IN V SW2 L2
VOUT C OUT RL
Fig.7 Power Stage Ripple Current Path
www.richtek-ic.com.tw
DS9237-00 January 2002
12
Preliminary
RT9237
Next to IC Pin(s) www..com +12V
+12V or +5V
C BP
PVCC
VCC
C BOOT
Use Individual Metal Runs for Each Channel to help Isolate Output Stages
PWM IMAX IRMP ADJ
VCC
+5VIN
C BP Next to IC Pin(s) COMP CC RC Locate next to FB Pin
RT9600 PHASE C IN
LO1
VCORE
RT9237 C OUT Kelvin Sense Parallel Trace R ISP R ISN Locate next to IC FB ISPX ISNX VSEN
R FB
Locate near Transistor
Fig.8 Layout Consideration
DS9237-00 January 2002
www.richtek-ic.com.tw
13
RT9237
Package Information
Preliminary
www..com
H M
B
B
J
A C F D
I
Symbol A B C D F H I J M
Dimensions In Millimeters Min 17.704 7.391 2.362 0.330 1.194 0.229 0.102 10.008 0.381 Max 18.110 7.595 2.642 0.508 1.346 0.330 0.305 10.643 1.270
Dimensions In Inches Min 0.697 0.291 0.093 0.013 0.047 0.009 0.004 0.394 0.015 Max 0.713 0.299 0.104 0.020 0.053 0.013 0.012 0.419 0.050
28-Lead SOP Plastic Package
www.richtek-ic.com.tw
DS9237-00 January 2002
14
Preliminary
RT9237
www..com
RICHTEK TECHNOLOGY CORP.
Headquarter
6F, No. 35, Hsintai Road, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5510047 Fax: (8863)5537749
RICHTEK TECHNOLOGY CORP.
Taipei Office (Marketing)
8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek-ic.com.tw
DS9237-00 January 2002
www.richtek-ic.com.tw
15

▲Up To Search▲

Price & Availability of RT9237

	To Download RT9237 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .